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While the Zorro II bus design was based in large part on an already
existing bus cycle, the 68000 cycle, the Zorro III bus design had a much
different set of preconditions.  It is not modeled after any particular
CPU specific bus protocol, but instead it's a logical outgrowth of both
the need to support Zorro II cards on the same bus and the need to achieve
various modern feature and preformance goals.  These goals were summarized
in the Zorro Expansion Bus  Introduction , now they'll be covered in
greater detail here.

 Basic Zorro III Bus Cycles       Quick Bus Arbitration 
 Advanced Mode Support Logic      Quick Interrupts 
 Multiple Transfer Cycles         Compatibility With Zorro II Devices 

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